Differences

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--- boards:lrwan1 [2024/09/10 13:47] – [Pinout] darron
+++ boards:lrwan1 [2024/09/18 13:21] (current) – [LoRaWAN firmware] darron
@@ Line 9: / Line 9: @@
 \\ \\
 {{boards:lrwan1modint.jpg?100}}
+\\ \\
+{{boards:inucleopins.jpg?200}}
 </wrap>
@@ Line 85: / Line 87: @@
 </code>
-==Arduino==
+==Arduino host==
 <code>
 I2C
@@ Line 132: / Line 134: @@
 PB10 LPUART_TX
 PB11 LPUART_RX
+PB6 I2C1 SCL
+PB7 I2C1 SDA
 </code>
@@ Line 160: / Line 165: @@
 </code>
-==Custom firmware==
-[[https://github.com/USIWP1Module/USI_I-NUCLEO-LRWAN1/tree/master/I-CUBE-LRWAN_patchs/I-CUBE-LRWAN%201.2.2|Guide]]
+===JLink===
-It would appear that once the factory default firmware is wiped that it cannot
+Patch the host [[boards:l073rz#st-link|ST-LINK]] port to the daughterboard.
-be restored, however, the default firmware appears to be buggy in any case.
+<code>
+/opt/JLink/JLinkExe
+SEGGER J-Link Commander V7.98f (Compiled Aug 29 2024 10:30:06)
+DLL version V7.98f, compiled Aug 29 2024 10:29:39
+Connecting to J-Link via USB...O.K.
+Firmware: J-Link STLink V21 compiled Aug 12 2019 10:29:20
+Hardware version: V1.00
+J-Link uptime (since boot): N/A (Not supported by this model)
+S/N: 772410336
+VTref=3.300V
+Type "connect" to establish a target connection, '?' for help
+J-Link>connect
+Please specify device / core. <Default>: STM32L052T8
+Type '?' for selection dialog
+Device>STM32L052T8
+Please specify target interface:
+  J) JTAG (Default)
+  S) SWD
+  T) cJTAG
+TIF>s
+Specify target interface speed [kHz]. <Default>: 4000 kHz
+Speed>
+Device "STM32L052T8" selected.
+Connecting to target via SWD
+InitTarget() start
+SWD selected. Executing JTAG -> SWD switching sequence.
+DAP initialized successfully.
+InitTarget() end - Took 9.43ms
+Found SW-DP with ID 0x0BC11477
+DPv0 detected
+CoreSight SoC-400 or earlier
+Scanning AP map to find all available APs
+AP[1]: Stopped AP scan as end of AP map has been reached
+AP[0]: AHB-AP (IDR: 0x04770031, ADDR: 0x00000000)
+Iterating through AP map to find AHB-AP to use
+AP[0]: Core found
+AP[0]: AHB-AP ROM base: 0xF0000000
+CPUID register: 0x410CC601. Implementer code: 0x41 (ARM)
+Found Cortex-M0 r0p1, Little endian.
+FPUnit: 4 code (BP) slots and 0 literal slots
+CoreSight components:
+ROMTbl[0] @ F0000000
+[0][0]: E00FF000 CID B105100D PID 000BB4C0 ROM Table
+ROMTbl[1] @ E00FF000
+[1][0]: E000E000 CID B105E00D PID 000BB008 SCS
+[1][1]: E0001000 CID B105E00D PID 000BB00A DWT
+[1][2]: E0002000 CID B105E00D PID 000BB00B FPB
+Memory zones:
+  Zone: "Default" Description: Default access mode
+Cortex-M0 identified.
+J-Link>
+</code>
+===LoRaWAN firmware===
+Patches for I-CUBE LoRaWAN 1.2.2 are [[https://github.com/USIWP1Module/USI_I-NUCLEO-LRWAN1/tree/master/I-CUBE-LRWAN_patchs/I-CUBE-LRWAN%201.2.2|here]].
+The I-CUBE LoRaWAN demo has been already patched and updated to support GNU make [[https://hg.kewl.org/pub/LauraWAN|here]].
+NB once the factory default firmware is wiped it cannot be restored.
 ===Resources===
@@ Line 176: / Line 246: @@
 [[https://github.com/USIWP1Module/USI_I-NUCLEO-LRWAN1|Firmware]]
+[[https://www.st.com/en/microcontrollers-microprocessors/stm32l052t8.html|MCU product page]]
+[[https://www.st.com/resource/en/datasheet/stm32l052t8.pdf|MCU data-sheet]]
+[[https://www.st.com/resource/en/reference_manual/rm0376-ultralowpower-stm32l0x2-advanced-armbased-32bit-mcus-stmicroelectronics.pdf|MCU reference manual]]
 [[https://www.st.com/en/evaluation-tools/p-nucleo-lrwan1.html|P-NUCLEO-LRWAN1]]

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