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boards:l073rz [2024/08/12 11:24] – [Solder bridges] darronboards:l073rz [2024/09/10 18:15] (current) – [ST-LINK] darron
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 ====NUCLEO-L073RZ==== ====NUCLEO-L073RZ====
 +
 +32 MHz STM32L073RZ Cortex-M0+ with 192 KB flash and 20 KB RAM.
  
 <wrap right> <wrap right>
 {{boards:lrwan2.jpg?100}} {{boards:lrwan2.jpg?100}}
 \\ \\ \\ \\
-{{boards:ardl073rz.jpg?100}}+{{boards:l073rz-front.jpg?100}}
 \\ \\ \\ \\
 {{boards:l073rz-back.jpg?100}} {{boards:l073rz-back.jpg?100}}
 +\\ \\
 +{{boards:ardl073rz.jpg?100}}
 +\\ \\
 +{{boards:stlinkdaughter.jpg?100}}
 </wrap> </wrap>
  
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 <code> <code>
-PC10 USART4_TX CN3 RX +PC10 USART4_TX 
-PC11 USART4_RX CN3 TX+PC11 USART4_RX 
 + 
 +CN3 STLINK RX 
 +CN3 STLINK TX
 </code> </code>
  
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 SB13 and SB14 ON, SB62 and SB63 OFF SB13 and SB14 ON, SB62 and SB63 OFF
 <code> <code>
-PA2 ST-LINK +PA2 USART2_TX ST-LINK RX 
-PA3 ST-LINK+PA3 USART2_RX ST-LINK TX
 </code> </code>
  
-__Default for NUCLEO-L073RZ with [[i-nucleo-lrwan1|I-NUCLEO-LRWAN1]]__+__Default for NUCLEO-L073RZ with [[lrwan1|I-NUCLEO-LRWAN1]]__
  
 SB13 and SB14 OFF, SB62 and SB63 ON SB13 and SB14 OFF, SB62 and SB63 ON
 <code> <code>
-PA2 ARD  +PA2 USART2_TX ARD D1 TX 
-PA3 ARD+PA3 USART2_RX ARD D0 RX
 </code> </code>
  
 +===ST-LINK===
  
 +By removing the two jumpers at CN2, the ST-LINK interface can be used
 +to program another board such as the  [[lrwan1|I-NUCLEO-LRWAN1]] daughterboard.
 +
 +
 +<code>
 +1 VDD TARGET
 +2 SWCLK
 +3 GND
 +4 SWDIO
 +5 NRST
 +6 SWO (RESERVED)
 +</code>
 ===Resources=== ===Resources===
  
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 [[https://www.st.com/resource/en/user_manual/um1724-stm32-nucleo64-boards-mb1136-stmicroelectronics.pdf|User manual]] [[https://www.st.com/resource/en/user_manual/um1724-stm32-nucleo64-boards-mb1136-stmicroelectronics.pdf|User manual]]
 +
 +[[https://www.st.com/resource/en/schematic_pack/mb1136-default-c04_schematic.pdf|Schematic]]
  
 [[https://www.st.com/resource/en/datasheet/stm32l073rz.pdf|MCU data-sheet]] [[https://www.st.com/resource/en/datasheet/stm32l073rz.pdf|MCU data-sheet]]