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boards:h755ziq [2024/10/30 02:03] – [Resources] darronboards:h755ziq [2025/02/05 05:30] (current) – [NUCLEO-H755ZI-Q] darron
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 </wrap> </wrap>
  
-Dual core MCU with Cortex-M7 at 480MHz and Cortex-M4 at 240MHz with 2MB Flash and 1MB RAM.+Dual core STM32H755ZI MCU with Cortex-M7 at 480MHz and Cortex-M4 at 240MHz with 2MB Flash and 1MB RAM.
  
 +
 +The Q suffix indicates that this processor and board contains a SMPS.
 +
 +The user manual explains that the SMPS must be enabled in
 +firmware otherwise there will be no connection to the device over ST-LINK.
 ===Pinout=== ===Pinout===
  
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 [[https://www.st.com/resource/en/application_note/dm00272912-managing-memory-protection-unit-in-stm32-mcus-stmicroelectronics.pdf|STM32 ARM MPU]] [[https://www.st.com/resource/en/application_note/dm00272912-managing-memory-protection-unit-in-stm32-mcus-stmicroelectronics.pdf|STM32 ARM MPU]]
  
-[[https://developer.arm.com/documentation/dui0552/a/cortex-m3-peripherals/optional-memory-protection-unit/mpu-access-permission-attributes?lang=en|ARM MPU registers]]+[[https://developer.arm.com/documentation/dui0552/a/cortex-m3-peripherals/optional-memory-protection-unit/mpu-access-permission-attributes?lang=en|ARM MPU permissions]]