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</ | </ | ||
- | One day I may solder them in place. | + | One day I will solder them in place. |
+ | === Firmware === | ||
+ | |||
+ | Out of the box this board doesn' | ||
+ | day computer so I never used it until 8 years after buying it in 2014. | ||
+ | |||
+ | Without an upgrade it doesn' | ||
+ | The fact that it doesn' | ||
+ | very hard to upgrade. | ||
+ | |||
+ | You have to download new firmware to upgrade the bootloader from version 0.11 | ||
+ | to something higher that will work with a modern PC. Somehow I managed to get it | ||
+ | to upgrade using Windows XP in a VirtualBox VM. | ||
+ | |||
+ | Once the upgrade magically worked I further updated it from OpenSDA to J-Link for NXP. | ||
+ | |||
+ | The files I think I used to proceed were (I have a bad memory but this is probably close): | ||
+ | |||
+ | < | ||
+ | DEBUG-APP_Pemicro_v108.SDA | ||
+ | BOOTUPDATEAPP_Pemicro_v111.SDA | ||
+ | 12_OpenSDA_FRDM-KL25Z.bin | ||
+ | </ | ||
+ | |||
+ | Good luck. | ||
+ | |||
+ | === Programming === | ||
+ | |||
+ | __frdm-kl25z.jlink__ | ||
+ | |||
+ | < | ||
+ | USB 000000123456 | ||
+ | Device MKL25Z128xxx4 | ||
+ | SelectInterface SWD | ||
+ | Speed 4000 | ||
+ | Reset | ||
+ | Exit | ||
+ | </ | ||
+ | |||
+ | < | ||
+ | / | ||
+ | SEGGER J-Link Commander V7.82 (Compiled Oct 13 2022 13:42:33) | ||
+ | DLL version V7.82, compiled Oct 13 2022 13:42:08 | ||
+ | |||
+ | |||
+ | J-Link Command File read successfully. | ||
+ | Processing script file... | ||
+ | J-Link> | ||
+ | Connecting to J-Link via USB...O.K. | ||
+ | Firmware: J-Link OpenSDA compiled May 27 2019 10:59:53 | ||
+ | Hardware version: V1.00 | ||
+ | J-Link uptime (since boot): N/A (Not supported by this model) | ||
+ | S/N: 621000000 | ||
+ | VTref=3.300V | ||
+ | J-Link> | ||
+ | J-Link> | ||
+ | Selecting SWD as current target interface. | ||
+ | J-Link> | ||
+ | Selecting 4000 kHz as target interface speed | ||
+ | J-Link> | ||
+ | Target connection not established yet but required for command. | ||
+ | Device " | ||
+ | |||
+ | |||
+ | Connecting to target via SWD | ||
+ | ConfigTargetSettings() start | ||
+ | ConfigTargetSettings() end | ||
+ | InitTarget() start | ||
+ | InitTarget() | ||
+ | InitTarget() end | ||
+ | Found SW-DP with ID 0x0BC11477 | ||
+ | DPv0 detected | ||
+ | CoreSight SoC-400 or earlier | ||
+ | AP map detection skipped. Manually configured AP map found. | ||
+ | AP[0]: AHB-AP (IDR: Not set) | ||
+ | AP[1]: MEM-AP (IDR: Not set) | ||
+ | AP[0]: Core found | ||
+ | AP[0]: AHB-AP ROM base: 0xF0002000 | ||
+ | CPUID register: 0x410CC600. Implementer code: 0x41 (ARM) | ||
+ | Found Cortex-M0 r0p0, Little endian. | ||
+ | FPUnit: 2 code (BP) slots and 0 literal slots | ||
+ | CoreSight components: | ||
+ | ROMTbl[0] @ F0002000 | ||
+ | [0][0]: F0000000 CID B105900D PID 000BB932 MTB-M0+ | ||
+ | [0][1]: F0001000 CID B105900D PID 0008E000 MTBDWT | ||
+ | [0][2]: E00FF000 CID B105100D PID 000BB4C0 ROM Table | ||
+ | ROMTbl[1] @ E00FF000 | ||
+ | [1][0]: E000E000 CID B105E00D PID 000BB008 SCS | ||
+ | [1][1]: E0001000 CID B105E00D PID 000BB00A DWT | ||
+ | [1][2]: E0002000 CID B105E00D PID 000BB00B FPB | ||
+ | Cortex-M0 identified. | ||
+ | Reset delay: 0 ms | ||
+ | Reset type NORMAL: Resets core & peripherals via SYSRESETREQ & VECTRESET bit. | ||
+ | Reset: Halt core after reset via DEMCR.VC_CORERESET. | ||
+ | Reset: Reset device via AIRCR.SYSRESETREQ. | ||
+ | J-Link> | ||
+ | |||
+ | Script processing completed. | ||
+ | </ | ||
=== Resources === | === Resources === | ||
- | [[https:// | + | {{:downloads:FRMD-KL25Z.pdf|Manual and schematic}} |