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boards:opi0 [2017/01/11 06:57]
darron [GPIO]
boards:opi0 [2020/08/05 04:53] (current)
darron [Pickle Microchip PIC ICSP]
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 It contains four ARMv7 CPU cores present in the AllWinner H2+ (cost reduced H3) system on a chip. It contains four ARMv7 CPU cores present in the AllWinner H2+ (cost reduced H3) system on a chip.
 +
 +A debian derived distribution of Linux called Armbian works on this device. It's important
 +to install this on a class 10 microsd card and not a class 4 which has incredibly poor
 +write performance. A sandisk ultra micro SDHC 10x works well.
 === GPIO === === GPIO ===
-The board has a [[boards:rpi|Raspberry Pi]] compatible GPIO header with 26 pins, an Orange Pi0 specific header with 13 pins and a serial console at 9600 baud.+The board has a [[boards:rpi|Raspberry Pi]] compatible GPIO header with 26 pins, an Orange Pi Zero specific header with 13 pins and a serial console at 9600 baud.
  
 Whilst the GPIO header is compatible with the RPi the orientation is different. Whilst the GPIO header is compatible with the RPi the orientation is different.
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 </code> </code>
  
-This is the relationship between the OPi0 GPIO, H2+/H3 I/O, the Linux sysfs interface and the H2+/H3 alternate pin functions.+This is the relationship between the Orange Pi Zero GPIO pins, H2+/H3 I/O, Linux sysfs interface and the H2+/H3 alternate pin functions.
  
 ^Pin ^H2+/H3 I/O ^sysfs ^ALT  | ^Pin ^H2+/H3 I/O ^sysfs ^ALT  |
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 </wrap> </wrap>
  
-We can use the OPi0 GPIOs to program PICMicros using [[projects:pickle|Pickle Microchip PIC ICSP]].+We can use the Orange Pi Zero GPIOs to program PICMicros using [[projects:pickle|Pickle Microchip PIC ICSP]].
  
-At this time only the [[projects:gpio-bb|GPIO bit-bang driver for Linux]] may be utilised on the OPi0 GPIO pins.+The [[projects:gpio-bb|GPIO bit-bang driver for Linux]] may also be utilised on the Orange Pi Zero 
 +and uses the same numbering.
  
 == Low Voltage Programming with VPP at 3V3 == == Low Voltage Programming with VPP at 3V3 ==
  
-Low voltage ICSP at 3V3 can be performed directly from the OPi0 GPIOs.+Low voltage ICSP at 3V3 can be performed directly from the GPIOs.
  
-The following connections refer to the OPi0 GPIO header. Ensure that power is only ever applied from GPIO 3V3 on PIN 1 and never 5V.+The following connections refer to the GPIO header. Ensure that power is only ever applied from GPIO 3V3 on PIN 1 and never 5V.
  
-Single common data I/O connection (GPIO bit-bang driver) without PGM.+Single common data I/O connection (OPI0 or GPIO bit-bang driver) without PGM.
 <code> <code>
  OPi0 H2+/H3                       PICMicro       GPIO header     .pickle  OPi0 H2+/H3                       PICMicro       GPIO header     .pickle
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 (R1) 10K !MCLR pull-up (R1) 10K !MCLR pull-up
 (R2..R4) 390R. (R2..R4) 390R.
 +
 +DEVICE=OPI0
 + or
 +DEVICE=GPIO-BB
 +IFACE=/dev/gpio-bb
 </code> </code>