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boards:k8048 [2014/12/13 11:58] darron |
boards:k8048 [2015/03/22 21:55] (current) |
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==== Velleman K8048 ==== | ==== Velleman K8048 ==== | ||
+ | <wrap right> | ||
+ | {{: | ||
+ | </ | ||
- | == Socket Cross Reference == | + | The Velleman K8048 is long-standing board that incorporates a serial port programmer and experimenter' |
+ | |||
+ | Although the interface connects to the serial port, it doesn' | ||
+ | the RS-232 serial protocol and instead programming is performed using bit-banging. | ||
+ | |||
+ | |||
+ | === Serial Interface === | ||
+ | |||
+ | The bit-bang programmer has the following serial interface | ||
+ | characteristics (D-SUB-9). | ||
+ | |||
+ | < | ||
+ | | ||
+ | | ||
+ | 1 2 3 4 5 | ||
+ | 6 7 8 9 | ||
+ | |||
+ | | ||
+ | | ||
+ | | ||
+ | | ||
+ | | ||
+ | | ||
+ | | ||
+ | | ||
+ | | ||
+ | </ | ||
+ | |||
+ | Data output bits are sent through the DTR line and clocked on the falling | ||
+ | edge of RTS. | ||
+ | |||
+ | The Tx line is utilised to enable the application of the high programming | ||
+ | voltage on !MCLR/VPP and not for sending data bits. | ||
+ | |||
+ | Data input bits are read from the CTS line using the same clock as for | ||
+ | output with the data output line taken high for correct circuit operation. | ||
+ | |||
+ | |||
+ | === Socket Cross Reference | ||
< | < | ||
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</ | </ | ||
- | == ICSP == | + | === ICSP === |
< | < | ||
- | | + | SK3 |
- | + | ||
- | ICSP | + | |
| | ||
5 4 3 2 1 | 5 4 3 2 1 | ||
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4:PGD | 4:PGD | ||
5:PGC | 5:PGC | ||
- | </ | ||
- | < | + | |
- | ICSP voltage | + | |
- | -------------------------------------------------------------- | + | |
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</ | </ | ||
+ | |||
+ | === Resources === | ||
+ | [[http:// | ||
+ | |||
+ |