====Segger J-Link====
{{tools:swd-jtag.jpg?200|Misc}}
\\ \\
{{tools:swd-10pin-adapter.jpg?100|Adafruit SWD Adapter}} {{tools:jlinkedupins.png?100|J-Link EDU Mini Pinout}}
\\ \\
{{tools:jtag-front-adapter.jpg?100|Adafruit JTAG Adapter}} {{tools:jtag-reverse-adapter.jpg?100|Adafruit JTAG Adapter}}
J-Link can utilise a dedicated programming device such as the JLink EDU Mini or be embedded on a prototyping board such as a STM32 NUCLEO.
The header is tiny on the JLink EDU Mini, however, a JTAG/SWD adapter like the one
from Adafruit can break this out onto a breadboard or header leads.
There are clones of the J-Link interfaces which SEGGER do not license to be used with the
official software and it's a good idea to keep to their wishes. Clones may use
[[:tools:openocd|OpenOCD]] instead.
===Install===
==Raspberry Pi==
J-Link doesn't work on the original Pi or Pi Zero with the armv6l core, it only works with armv7l or aarch64. If you
run J-Link on arm6l it will crash with a segmentation fault.
Visit the [[https://www.segger.com/downloads/jlink/JLink_Linux_arm.tgz|J-Link for ARM]] page or [[https://www.segger.com/downloads/jlink/JLink_Linux_V792a_arm64.tgz|J-Link for ARM64]] page
and agree to their terms, after which you may download the armv7l or aarch64 compatible binaries to store in /opt.
cd /opt
tar zxvf JLink_Linux_V782a_arm.tgz
chown -R 0:0 JLink_Linux_V782a_arm/
ln -s JLink_Linux_V782a_arm JLink
apt install libsm6
cp /opt/JLink/99-jlink.rules /etc/udev/rules.d/
udevadm control --reload-rules
udevadm trigger
The udev rules didn't work for me so I use my [[http://hg.kewl.org/pub/rules.d/raw-file/1ab9e879dc61/10-local.rules|own]].
NB do not add /opt/JLink to ldconfig path since on ARM64 a 32-bit library will be
included which breaks JLink.
===Windows===
[[https://www.segger.com/downloads/jlink/JLink_Windows_x86_64.exe|Windows 64-bit]]
[[https://www.segger.com/downloads/jlink/JLink_Windows.exe|Windows 32-bit]]
===Test===
When you run JLinkExe it will popup a dialog every day about accepting
a license. This means you must have X11 available to accept its
terms. If X11 is not available the tool will still work but
the output dialog will contain a failed connection message.
The configuration and license terms are stored in $HOME/.config/SEGGER/
==NUCLEO-F302R8==
{{:tools:jlinkstm32.jpg?200}}
This board has had ST-Link replaced by JLink on-board.
Upgrading to JLink requires an older ST-LINK firmware to be
installed as newer versions fail to be detected. A working
firmware for upgrade is V2.J40.M27
echo "exit" | /opt/JLink/JLinkExe -device STM32F302R8 -if swd -speed 4000 -autoconnect 1 -nogui 1
SEGGER J-Link Commander V7.82 (Compiled Oct 13 2022 13:42:33)
DLL version V7.82, compiled Oct 13 2022 13:42:08
Connecting to J-Link via USB...O.K.
Firmware: J-Link STLink V21 compiled Aug 12 2019 10:29:20
Hardware version: V1.00
J-Link uptime (since boot): N/A (Not supported by this model)
S/N: 778717038
VTref=3.300V
Device "STM32F302R8" selected.
Connecting to target via SWD
InitTarget() start
InitTarget() end
connect /tmp/.X11-unix/X0: No such file or directory
JLinkGUIServerExe: cannot connect to X server localhost:10.0
Found SW-DP with ID 0x4BA01477
DPv0 detected
CoreSight SoC-400 or earlier
Scanning AP map to find all available APs
AP[1]: Stopped AP scan as end of AP map has been reached
AP[0]: AHB-AP (IDR: 0x24770011)
Iterating through AP map to find AHB-AP to use
AP[0]: Core found
AP[0]: AHB-AP ROM base: 0xE00FF000
CPUID register: 0x410FC241. Implementer code: 0x41 (ARM)
Found Cortex-M4 r0p1, Little endian.
FPUnit: 6 code (BP) slots and 2 literal slots
CoreSight components:
ROMTbl[0] @ E00FF000
[0][0]: E000E000 CID B105E00D PID 000BB00C SCS-M7
[0][1]: E0001000 CID B105E00D PID 003BB002 DWT
[0][2]: E0002000 CID B105E00D PID 002BB003 FPB
[0][3]: E0000000 CID B105E00D PID 003BB001 ITM
[0][4]: E0040000 CID B105900D PID 000BB9A1 TPIU
Cortex-M4 identified.
OnDisconnectTarget() start
OnDisconnectTarget() end
The JLink error message for its license popup can be disabled by
renaming the JLink GUI Server EXE.
mv /opt/JLink/JLinkGUIServerExe /opt/JLink/JLinkGUIServerExe.bak
==ARDUINO DUE==
{{:tools:jlinkedu.jpg?200}}
This example uses JLink for Windows within a WSL1 terminal.
echo "exit" | /mnt/c/Program\ Files/SEGGER/JLink/JLink.exe -device ATSAM3X8E -if jtag -jtagconf '-1 -1' -speed 4000 -autoconnect 1 -nogui 1
SEGGER J-Link Commander V7.82 (Compiled Oct 13 2022 13:39:13)
DLL version V7.82, compiled Oct 13 2022 13:37:46
Connecting to J-Link via USB...O.K.
Firmware: J-Link EDU Mini V1 compiled Sep 22 2022 14:55:40
Hardware version: V1.00
J-Link uptime (since boot): 0d 00h 17m 33s
S/N: 801011752
License(s): FlashBP, GDB
USB speed mode: Full speed (12 MBit/s)
VTref=3.242V
Device "ATSAM3X8E" selected.
Connecting to target via JTAG
TotalIRLen = 4, IRPrint = 0x01
JTAG chain detection found 1 devices:
#0 Id: 0x4BA00477, IRLen: 04, CoreSight JTAG-DP
DPv0 detected
Scanning AP map to find all available APs
AP[1]: Stopped AP scan as end of AP map has been reached
AP[0]: AHB-AP (IDR: 0x24770011)
Iterating through AP map to find AHB-AP to use
AP[0]: Core found
AP[0]: AHB-AP ROM base: 0xE00FF000
CPUID register: 0x412FC230. Implementer code: 0x41 (ARM)
Found Cortex-M3 r2p0, Little endian.
FPUnit: 6 code (BP) slots and 2 literal slots
CoreSight components:
ROMTbl[0] @ E00FF000
[0][0]: E000E000 CID B105E00D PID 002BB000 SCS
[0][1]: E0001000 CID B105E00D PID 002BB002 DWT
[0][2]: E0002000 CID B105E00D PID 002BB003 FPB
[0][3]: E0000000 CID B105E00D PID 002BB001 ITM
[0][4]: E0040000 CID B105900D PID 002BB923 TPIU-Lite
Cortex-M3 identified.
J-Link>
===Resources===
[[https://www.segger.com/products/debug-probes/j-link/models/j-link-edu-mini/|J-Link EDU Mini Product Page]]
[[https://wiki.segger.com/J-Link_Commander|J-Link commands and command line]]
[[https://www.segger.com/products/debug-probes/j-link/models/other-j-links/st-link-on-board/|J-Link for STM32]]
[[https://www.segger.com/products/debug-probes/j-link/technology/cpus-and-devices/overview-of-supported-cpus-and-devices/|Supported processors]]