ICSP I/O is a protocol and group of functions designed to quickly develop test code for the devices supported by Pickle Microchip PIC ICSP.
It uses the I/O lines used by the ICSP programming protocol and is compatible with bit-bang programmers such as the Velleman K8048.
ICSP I/O was not designed as a replacement for more established and more reliable protocols but it can be used for prototyping.
ICSP I/O is licensed under same terms as Pickle Microchip PIC ICSP which is the origin of this software project. The Pickle LICENCE is found here. This licence details the rights and liabilities of using the application and it should be especially understood that I, the author, will not accept any responsibility for any side effects of running it. Do not download and use this firmware unless you are willing to accept the consequences of it failing for any reason.
hg clone http://hg.kewl.org/pub/pickles cd pickles make make install
#INCLUDE "device.inc" ;DEVICE CONFIG #INCLUDE "const.inc" ;CONSTANTS #INCLUDE "macro.inc" ;MACROS #INCLUDE "delay.inc" ;DELAY COUNTERS #INCLUDE "shadow.inc" ;SHADOW I/O (ONLY USE IF DEVICE HAS NO LATCH) NPINS SET .18 ;18-PIN PDIP #INCLUDE "icspio.inc" ;ICSP I/O
Internal variable addresses are assigned at the current CBLOCK address. It is up to the main source file to ensure that this address is both valid and that there is enough space for allocation.
The include files are located in /usr/local/share/pickle/include
ptest 5 ARG
pio CMD ARG
Fetches a byte from the master (host) and stores it in BUFFER.
Sets W and also sets the carry bit on error (time-out, protocol or
parity error).
Sends a byte in W to the master (host).
Sets W and also sets the carry bit on a time-out error.
Calls SENDBYTE with W=ACK (acknowledge)
Calls SENDBYTE with W=NAK (negative acknowledge)
2 levels of stack are used when calling the routines GETBYTE, SENDBYTE or SENDTERM. On 12-bit word architecture devices do not call any of these routines from within a sub-routine since it will overflow the stack.
PGD is used for data I/O with even parity and PGC for clock synchronisation. PGC is unidirectional and is only controlled by the master (host), this is the slave. The interface may or not be inverted but this is catered for by Pickle Microchip PIC ICSP BITRULES inversion logic.
Data is set up on the master prior to a clock low to high transition and set up on the slave after a clock low to high transition. Data is read after a clock high to low transition on both master and slave.
Start and stop bits have data held low and high respectively and if invalid then a protocol error is flagged and the transaction terminated without further communication on either end. Parity error causes a similar closure of the session.
PGC +--+ +--+ +--+ +--+ +--+ +--+ +--+ +--+ +--+ +--+ +--+ | | | | | | | | | | | | | | | | | | | | | | ------+ +--+ +--+ +--+ +--+ +--+ +--+ +--+ +--+ +--+ +--+ +------- PGD START DATA DATA DATA DATA DATA DATA DATA DATA EVEN STOP XXXXXXLLLLLL000000111111222222333333444444555555666666777777PPPPPPHHHHHHHHHHH BIT BIT0 BIT1 BIT2 BIT3 BIT4 BIT5 BIT6 BIT7 PAR. BIT
1 start bit, 8 data bits, even parity and one stop bit. The data line is normally held high since in order to operate bi-directionally data output must be held high in order for data input to operate with the Velleman K8048.
Arch. | Stack level |
---|---|
12 | 2 |
14 | 8 |
16 | 31 |