====I-NUCLEO-LRWAN1====
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The I-NUCLEO-LRWAN1 is an [[interfaces:semtech|SX1272]] daughterboard with an STM32L052T8Y6 MCU.
This board comes as part of the [[:boards:lrwan2|P-NUCLEO-LRWAN2]] kit and the motherboard
is a [[boards:l073rz|NUCLEO-L073RZ]].
Three I2C sensors exist on the board, a LSM303AGR, an HTS221 and a LPS22HB which
are designed to be connected to the motherboard.
The I-NUCLEO-LRWAN1 is now obsolete but the embedded firmware can be replaced easily.
===Pinout===
==Mainboard==
JP1 POWER
LSM303AGR 3V3
JP2 RESET
MCU RST
JP3 POWER
HTS221 3V3
JP4 POWER
LPS22HB 3V3
JP6 SWD
1 3V3
2 SWCLK
3 GND
4 SWDIO
5 RST
JP7 GROVE I2C
1 SCL
2 SDA
3 3V3
4 GND
JP8 DEBUG
1 SPI1 NSS
2 SPI1 MOSI
3 SPI1 MISO
4 SPI1 SCK
JP9 DEBUG
1 NRST RF
2 DIO0
3 DIO1
4 DIO2
5 DIO3
6 DIO4
7 DIO5
JP12 INTERRUPT
LSM303AGR INT
JP13 DEBUG
1 ANTENNA SWITCH 1
2 ANTENNA SWITCH 2
JP14 POWER MEASUREMENT
VDD RF
JP15 POWER MEASUREMENT
VDD 3V3
SWITCH
S1 RST
==Arduino host==
I2C
D15 SCL
D14 SDA
SYSTEM
D7 WAKEUP
LPS22H
D5 INT
D6 DRDY
LSM0303AGR
A5 INT
A6 DRDY
LED
A0 D1 GREEN
LPUART
D1 RX
D0 TX
==Module==
PA9 RF RESET
PA12 SPI1 MOSI
PB4 SPI1 MISO
PB3 SPI1 SCK
PA15 SPI1 NSS
PA2 DIO0
PA3 DIO1
PA5 DIO2
PA6 DIO3
PA10 DIO4
PC7 DIO5 N/A
PA4 RF SWITCH CONTROL 1
PB8 RF SWITCH CONTROL 2
PB10 LPUART_TX
PB11 LPUART_RX
PB6 I2C1 SCL
PB7 I2C1 SDA
==RF SWITCH==
Switch the antenna of I-NUCLEO-LRWAN1 in TX mode
PA4 RF SWITCH CONTROL 1 = 1
PB8 RF SWITCH CONTROL 2 = 0
Switch the antenna of I-NUCLEO-LRWAN1 in RX mode
PA4 RF SWITCH CONTROL 1 = 0
PB8 RF SWITCH CONTROL 2 = 1
==Factory default firmware==
NO_CUSTOM_BAUD=1 picocom --imap lfcrlf --quiet -b 115200 /dev/ttyS5
+VER=1.0.1,2.9
+EUI=e2,4f,43,ff,fe,44,c3,84
+APPEUI=00,00,00,00,00,00,00,00
+AK=11,22,33,44,55,66,77,88,99,aa,bb,cc,dd,ee,ff,00
at+join=1,1
+JoinAccepted
===JLink===
Patch the host [[boards:l073rz#st-link|ST-LINK]] port to the daughterboard.
/opt/JLink/JLinkExe
SEGGER J-Link Commander V7.98f (Compiled Aug 29 2024 10:30:06)
DLL version V7.98f, compiled Aug 29 2024 10:29:39
Connecting to J-Link via USB...O.K.
Firmware: J-Link STLink V21 compiled Aug 12 2019 10:29:20
Hardware version: V1.00
J-Link uptime (since boot): N/A (Not supported by this model)
S/N: 772410336
VTref=3.300V
Type "connect" to establish a target connection, '?' for help
J-Link>connect
Please specify device / core. : STM32L052T8
Type '?' for selection dialog
Device>STM32L052T8
Please specify target interface:
J) JTAG (Default)
S) SWD
T) cJTAG
TIF>s
Specify target interface speed [kHz]. : 4000 kHz
Speed>
Device "STM32L052T8" selected.
Connecting to target via SWD
InitTarget() start
SWD selected. Executing JTAG -> SWD switching sequence.
DAP initialized successfully.
InitTarget() end - Took 9.43ms
Found SW-DP with ID 0x0BC11477
DPv0 detected
CoreSight SoC-400 or earlier
Scanning AP map to find all available APs
AP[1]: Stopped AP scan as end of AP map has been reached
AP[0]: AHB-AP (IDR: 0x04770031, ADDR: 0x00000000)
Iterating through AP map to find AHB-AP to use
AP[0]: Core found
AP[0]: AHB-AP ROM base: 0xF0000000
CPUID register: 0x410CC601. Implementer code: 0x41 (ARM)
Found Cortex-M0 r0p1, Little endian.
FPUnit: 4 code (BP) slots and 0 literal slots
CoreSight components:
ROMTbl[0] @ F0000000
[0][0]: E00FF000 CID B105100D PID 000BB4C0 ROM Table
ROMTbl[1] @ E00FF000
[1][0]: E000E000 CID B105E00D PID 000BB008 SCS
[1][1]: E0001000 CID B105E00D PID 000BB00A DWT
[1][2]: E0002000 CID B105E00D PID 000BB00B FPB
Memory zones:
Zone: "Default" Description: Default access mode
Cortex-M0 identified.
J-Link>
===LoRaWAN firmware===
Patches for I-CUBE LoRaWAN 1.2.2 are [[https://github.com/USIWP1Module/USI_I-NUCLEO-LRWAN1/tree/master/I-CUBE-LRWAN_patchs/I-CUBE-LRWAN%201.2.2|here]].
The I-CUBE LoRaWAN demo has been already patched and updated to support GNU make [[https://hg.kewl.org/pub/LauraWAN|here]].
NB once the factory default firmware is wiped it cannot be restored.
===Resources===
[[https://www.st.com/en/evaluation-tools/i-nucleo-lrwan1.html|Product page]]
[[https://www.st.com/resource/en/data_brief/i-nucleo-lrwan1.pdf|Data brief]]
[[https://www.st.com/resource/en/user_manual/um2587-getting-started-with-the-pnucleolrwan2-and-pnucleolrwan3-starter-packs-stmicroelectronics.pdf|User manual]]
[[https://github.com/USIWP1Module/USI_I-NUCLEO-LRWAN1|Firmware]]
[[https://www.st.com/en/microcontrollers-microprocessors/stm32l052t8.html|MCU product page]]
[[https://www.st.com/resource/en/datasheet/stm32l052t8.pdf|MCU data-sheet]]
[[https://www.st.com/resource/en/reference_manual/rm0376-ultralowpower-stm32l0x2-advanced-armbased-32bit-mcus-stmicroelectronics.pdf|MCU reference manual]]
[[https://www.st.com/en/evaluation-tools/p-nucleo-lrwan1.html|P-NUCLEO-LRWAN1]]
[[https://www.st.com/en/evaluation-tools/p-nucleo-lrwan2.html|P-NUCLEO-LRWAN2]]
[[https://www.usiglobal.com/en/products?id=ac1ab8b2-2047-4757-9ccb-8e23b5341820|USI WM-SG-SM-42 Product page]]
{{:downloads:wm-sg-sm-42_product-spec_rev05_20180322.pdf|USI WM-SG-SM-42 Product spec}}
{{:downloads:usi_lora_arduino_shield_sch_20161115-1.pdf|Arduino Shield Schematic}}
{{:downloads:wm-sg-sm-42_at_command_reference_manual_rev.2.6_20200225.pdf|AT Command Reference Manual}}